Zhaoxin, Via Cyrix: a WinChip story.

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Dirk Broer
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#1 Zhaoxin, Via Cyrix: a WinChip story.

Post by Dirk Broer »

No, this is not the title of the latest novel by the Chinese author Liu Cixin, but about a family of closely related x86 CPUs. It all started around 1997 when -quite accidentally and completely unrelated- I self-built my first PC, a Super Socket 7 system with VIA MVP3 chipset, able to have a 100 MHz frontal bus and to compete with the then king of x86 performance, the Intel Pentium II, that had moved to the then new Slot 1 platform.

When you now buy a x86-64 motherboard you can only plug in one brand of CPU (AMD or Intel, mostly, provied it doesn't have an onboard CPU or SOC ), but those days you bought a motherboard and then had a wealth of choice for the best CPU for your budget. My choices then included Intel, AMD, Cyrix, IBM or IDT. And as I blew almost my entire budget on a DFI P5BV3+ motherboard I had to settle for an IDT WinChip 225, as even an Intel Pentium MMX 233 was way out of my budget. My ultimate goal for that DFI board was a AMD K6-III.
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I can almost hear you thinking "an IDT WHAT?" The IDT part of the story starts with the original C6 Winchip, a low-powered Socket 7-based x86 processor designed by Centaur Technology and sold by its parent company, IDT, later followed by the WinChip2, WinChip2A, WinChip2B and WinChip3 -though the latter never made it to market because by then, in 1999, the Centaur Technology division of IDT was sold to VIA, them of those chipsets.
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And although VIA branded their next new 2001 Samuel-core CPUs by the then well-known brandname "Cyrix" (they had bought Cyrix earlier from National Semiconductor), the company initially used the technology from the unreleased WinChip 4 for its Socket 370 Cyrix III line.
That Cyrix III was further evolved into the Socket 370 VIA C3 (2001) and from there via the Socket 479 VIA C7 (2005). The BGA400 VIA Nano (2008) and VIA Nano X2 (2011) had a complete redesign as compared to the previous generations, enabling x86-64 support and x86 virtualization.
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The Zhaoxin joint venture processors, released from 2014, were initially based on the VIA Nano series, starting with the 2014 ZX-A and ZX-B that used the very VIA Isaiah micro-architecture. But by 2022 Zhaoxin engineers had progressed to an up to 32-core KaisHeng KH-40000, still using the x86 instruction set architecture (ISA), everything up to AVX (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, SM3, SM4, and AVX), but not supporting hyperthreading.
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